The present invention generally relates to semiconductor packaging, and more particularly to semiconductor lids.
Semiconductor packaging may use a lid covering an integrated circuit which is mounted on a substrate or a laminate. The integrated circuit may be mounted on the laminate via a flip chip ball grid array which provides electrical connection to the laminate which has external electronic connections. With increased performance of integrated circuits, an increasing number of decoupling capacitors, and other components are required to fit within a same surface area under the lid. Required tolerances for the lid are increasingly difficult to obtain using coining due to the increased number of components under the lid. Using machining as an alternative method of lid manufacturing may result in burs and protrusions, which may affect an optimal thermal contact with the integrated circuit under the lid, and also has higher cost implications.